Junctionless stackable SONOS memory realized on vertical-Si-nanowire for 3-D application

This work demonstrates a new type of SONOS memory in which there are no junctions. These junction-less (JL) devices are realized on vertical Si nanowire gate all-around structure with channel dimension down to 20nm and have comparable electrical characteristics (SS < 70 mV/dec, leakage current < 1 pA and a memory window of 3.2 V with 1 ms P/E) with the junction based wire SONOS. Being free of junctions, the process complexity is significantly reduced and this device becomes a suitable platform for vertically stacked ultra high density memory application.