We introduce ModulUS, a modular sandbox platform for wearable ultrasound (US) development. The four-board system integrates a 32-channel pulser, an analog frontend (AFE) with bandwidth reduction, and an ARM Cortex-M4 microcontroller (MCU) with a dual 5Msps, 12bit analog-digital converter (ADC), each implemented as a swappable module to support rapid prototyping and evaluation of alternative circuit architectures. To demonstrate its functionality, we validated the AFE board, which reduces the effective signal bandwidth by a factor of 4 while preserving structural features, with envelope fidelity confirmed against digital Hilbert transforms (R2 = 0.88). Compared to State-of-the-Art (SoA) platforms, ModulUS-derived designs set a new benchmark in power efficiency, achieving the lowest reported average power normalized by excitation frequency (0.6mW/MHz), down to two orders of magnitude below existing MCU- and Field Programmable Gate Arrays (FPGA)-based systems. By shifting bandwidth reduction (BWR) into the analog domain, ModulUS enables high-frequency, low-power US acquisition and establishes a flexible, reconfigurable testbed for next-generation wearable US technologies.
Leitner, C., Giordano, M., Tanner, M., Villani, F., Magno, M., Benini, L. (2025). ModulUS: A Sandbox for High-Resolution Wearable Ultrasound Development. IEEE Computer Society [10.1109/ius62464.2025.11201551].
ModulUS: A Sandbox for High-Resolution Wearable Ultrasound Development
Magno, Michele;Benini, Luca
2025
Abstract
We introduce ModulUS, a modular sandbox platform for wearable ultrasound (US) development. The four-board system integrates a 32-channel pulser, an analog frontend (AFE) with bandwidth reduction, and an ARM Cortex-M4 microcontroller (MCU) with a dual 5Msps, 12bit analog-digital converter (ADC), each implemented as a swappable module to support rapid prototyping and evaluation of alternative circuit architectures. To demonstrate its functionality, we validated the AFE board, which reduces the effective signal bandwidth by a factor of 4 while preserving structural features, with envelope fidelity confirmed against digital Hilbert transforms (R2 = 0.88). Compared to State-of-the-Art (SoA) platforms, ModulUS-derived designs set a new benchmark in power efficiency, achieving the lowest reported average power normalized by excitation frequency (0.6mW/MHz), down to two orders of magnitude below existing MCU- and Field Programmable Gate Arrays (FPGA)-based systems. By shifting bandwidth reduction (BWR) into the analog domain, ModulUS enables high-frequency, low-power US acquisition and establishes a flexible, reconfigurable testbed for next-generation wearable US technologies.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.



