End-to-end open-source electronic design automation enables a collaborative approach to chip design conducive to supply chain diversification and zero-trust step-by-step design verification. However, existing end-to-end OSEDA flows have mostly been demonstrated on small designs and have not yet enabled large, industry-grade chips such as Linux-capable systems-on-chip (SoCs). This work presents Basilisk, the largest end-to-end open-source SoC to date. Basilisk’s 34mm2, 2.7MGE design features a 64-bit Linuxcapable RISC-V core, a lightweight 124MB/s DRAM controller, and extensive IO, including a USB 1.1 host, a video output, and a fully digital 62Mb/s chip-to-chip (C2C) link. We implement Basilisk in IHP’s open 130nm BiCMOS technology, significantly improving on the state-of-the-art (SoA) OSEDA flow. Our enhancements of the Yosys-based synthesis flow improve design timing and area by 2.3×and 1.6×, respectively, while consuming significantly less system resources. By tuning OpenROAD place and route (P&R) to our design and technology, we decrease the die size by 12%. The fabricated Basilisk chip reaches 62MHz at its nominal 1.2V core voltage and up to 102MHz at 1.64V. It achieves a peak energy efficiency of 18.9DPMFLOP/s/W at 0.88V.

Sauter, P., Benz, T., Scheffler, P., Poviser, M., Gürkaynak, F.K., Benini, L. (2025). Basilisk: A 34mm² End-to-End Open-Source 64-bit Linux-Capable RISC-V SoC in 130nm BiCMOS : Integrated Systems Laboratory (ETH Zürich) [10.1109/hcs66204.2025.11154384].

Basilisk: A 34mm² End-to-End Open-Source 64-bit Linux-Capable RISC-V SoC in 130nm BiCMOS : Integrated Systems Laboratory (ETH Zürich)

Benini, Luca
2025

Abstract

End-to-end open-source electronic design automation enables a collaborative approach to chip design conducive to supply chain diversification and zero-trust step-by-step design verification. However, existing end-to-end OSEDA flows have mostly been demonstrated on small designs and have not yet enabled large, industry-grade chips such as Linux-capable systems-on-chip (SoCs). This work presents Basilisk, the largest end-to-end open-source SoC to date. Basilisk’s 34mm2, 2.7MGE design features a 64-bit Linuxcapable RISC-V core, a lightweight 124MB/s DRAM controller, and extensive IO, including a USB 1.1 host, a video output, and a fully digital 62Mb/s chip-to-chip (C2C) link. We implement Basilisk in IHP’s open 130nm BiCMOS technology, significantly improving on the state-of-the-art (SoA) OSEDA flow. Our enhancements of the Yosys-based synthesis flow improve design timing and area by 2.3×and 1.6×, respectively, while consuming significantly less system resources. By tuning OpenROAD place and route (P&R) to our design and technology, we decrease the die size by 12%. The fabricated Basilisk chip reaches 62MHz at its nominal 1.2V core voltage and up to 102MHz at 1.64V. It achieves a peak energy efficiency of 18.9DPMFLOP/s/W at 0.88V.
2025
(ETH Zürich), 2025 IEEE Hot Chips 37 Symposium (HCS)
1
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Sauter, P., Benz, T., Scheffler, P., Poviser, M., Gürkaynak, F.K., Benini, L. (2025). Basilisk: A 34mm² End-to-End Open-Source 64-bit Linux-Capable RISC-V SoC in 130nm BiCMOS : Integrated Systems Laboratory (ETH Zürich) [10.1109/hcs66204.2025.11154384].
Sauter, Philippe; Benz, Thomas; Scheffler, Paul; Poviser, Martin; Gürkaynak, Frank K.; Benini, Luca
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11585/1040810
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