Heterogeneous computing systems couple a general-purpose host processor with a single or multiple domain-specific accelerators. Generally, embedded systems exploit heterogeneity to increase energy efficiency through on-chip accelerators, while high-performance architectures leverage it for higher performance through powerful off-chip resources. In both cases, heterogeneity comes with programmability and portability challenges. In this work, we present HeroSDK, a software development kit (SDK) that facilitates both application developers and platform designers of RV-based heterogeneous accelerated computing systems. For developers, HeroSDK facilitates programming by offering OpenMP-based offloading and a device management library. For designers, it boosts portability by segmenting its codebase into platform-agnostic and platform-specific regions. We demonstrate HeroSDK on two open-source systems-on-chip coupling RISC-V 64-bit host processors with RISC-V 32-bit multi-core accelerators. By emulating these platforms on FPGA, we measure an overhead as small as 98k clock cycles to offload the simplest OpenMP regions within Linux user space applications. Additionally, we benchmark matrix-vector operations for both platforms and measure up to 5.9× speedup with a 19 % offload-to-work ratio using eight accelerator cores. Finally, we propose a kernel module to extend the HeroSDK capabilities to off-chip PCIe accelerator cards while reusing 100 % of its codebase.

Koenig, C., Forsberg, B., Benini, L. (2024). HeroSDK: Streamlining Heterogeneous RISC-V Accelerated Computing from Embedded to High-Performance Systems. Institute of Electrical and Electronics Engineers Inc. [10.1109/iccd63220.2024.00050].

HeroSDK: Streamlining Heterogeneous RISC-V Accelerated Computing from Embedded to High-Performance Systems

Benini, Luca
2024

Abstract

Heterogeneous computing systems couple a general-purpose host processor with a single or multiple domain-specific accelerators. Generally, embedded systems exploit heterogeneity to increase energy efficiency through on-chip accelerators, while high-performance architectures leverage it for higher performance through powerful off-chip resources. In both cases, heterogeneity comes with programmability and portability challenges. In this work, we present HeroSDK, a software development kit (SDK) that facilitates both application developers and platform designers of RV-based heterogeneous accelerated computing systems. For developers, HeroSDK facilitates programming by offering OpenMP-based offloading and a device management library. For designers, it boosts portability by segmenting its codebase into platform-agnostic and platform-specific regions. We demonstrate HeroSDK on two open-source systems-on-chip coupling RISC-V 64-bit host processors with RISC-V 32-bit multi-core accelerators. By emulating these platforms on FPGA, we measure an overhead as small as 98k clock cycles to offload the simplest OpenMP regions within Linux user space applications. Additionally, we benchmark matrix-vector operations for both platforms and measure up to 5.9× speedup with a 19 % offload-to-work ratio using eight accelerator cores. Finally, we propose a kernel module to extend the HeroSDK capabilities to off-chip PCIe accelerator cards while reusing 100 % of its codebase.
2024
Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
280
287
Koenig, C., Forsberg, B., Benini, L. (2024). HeroSDK: Streamlining Heterogeneous RISC-V Accelerated Computing from Embedded to High-Performance Systems. Institute of Electrical and Electronics Engineers Inc. [10.1109/iccd63220.2024.00050].
Koenig, Cyril; Forsberg, Björn; Benini, Luca
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11585/1004946
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