An in-memory computation (IMC) circuit includes a memory array formed by memory cells arranged in row-by-column matrix. Computational weights for an IMC operation are stored in the memory cells. Each column includes a bit line connected to the memory cells. A biasing circuit is connected between each bit line and a corresponding column output. A column combining circuit combines and integrates analog signals at the column outputs of the biasing circuits. Each biasing circuit operates to apply a fixed reference voltage level to its bit line. Each biasing circuit further includes a switching circuit that is controlled to turn on for a time duration controlled by asps comparison of a coefficient data signal to a ramp signal to generate the analog signal dependent on the computational weight. The ramp signal is generated using a reference current derived from a reference memory cell.

PASOTTI, M., CARISSIMI, M., ANTOLINI, A., FRANCHI SCARSELLI, E., GNUDI, A., LICO, A., et al. (2022). Compensated analog computation for an in-memory computation system.

Compensated analog computation for an in-memory computation system

ANTOLINI, Alessio;FRANCHI SCARSELLI, Eleonora;GNUDI, Antonio;LICO, Andrea;
2022

Abstract

An in-memory computation (IMC) circuit includes a memory array formed by memory cells arranged in row-by-column matrix. Computational weights for an IMC operation are stored in the memory cells. Each column includes a bit line connected to the memory cells. A biasing circuit is connected between each bit line and a corresponding column output. A column combining circuit combines and integrates analog signals at the column outputs of the biasing circuits. Each biasing circuit operates to apply a fixed reference voltage level to its bit line. Each biasing circuit further includes a switching circuit that is controlled to turn on for a time duration controlled by asps comparison of a coefficient data signal to a ramp signal to generate the analog signal dependent on the computational weight. The ramp signal is generated using a reference current derived from a reference memory cell.
2022
US2023326524A1
PASOTTI, M., CARISSIMI, M., ANTOLINI, A., FRANCHI SCARSELLI, E., GNUDI, A., LICO, A., et al. (2022). Compensated analog computation for an in-memory computation system.
PASOTTI, Marco; CARISSIMI, Marcella; ANTOLINI, Alessio; FRANCHI SCARSELLI, Eleonora; GNUDI, Antonio; LICO, Andrea; ROMELE, Paolo
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11585/945534
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