In the current design of the high luminosity SuperB asymmetric e+-e- collider, the center of mass boost is reduced with respect to BaBar and to efficiently perform the time-dependent measurements an improved vertex resolution is required. A vertex tracker based on the layout of the BaBar Silicon Vertex Tracker (SVT) with an additional innermost layer (Layer0) is a design that achieves such a tracking resolution, provided that the extra layer is placed at radius of 1.5 cm from the interaction point, its thickness is less than 1% X0 and it is able to withstand a background rate of several MHz/cm2. The different options for the Layer0 are reviewed, starting from the most technologically mature solution, a high resistivity short strip detector, describing then a smallpitch hybrid pixel detector and finally presenting the most challenging proposal, based on CMOS MAPS.
The SuperB Silicon Vertex Tracker / S. Bettarini; C. Avanzini; G. Batignani; F. Bosi; M. Ceccanti; R. Cenci; A. Cervelli; F. Crescioli; M. Dell'Orso; F. Forti; P. Giannetti; M.A. Giorgi; S. Gregucci; P. Mammini; G. Marchiori; M. Massa; F. Morsani; N. Neri; E. Paoloni; M. Piendibene; A. Profeti; G. Rizzo; L. Sartori; J. Walsh; E. Yurtsev; A.Lusiani; M. Manghisoni; V. Re; G. Traversi; M. Bruschi; R. Di Sipio; B. Giacobbe; A. Gabrielli; F. Giorgi; G. Pellegrini; C. Sbarra; N. Semprini; R. Spighi; S. Valentinetti; M. Villa; A. Zoccoli; M. Citterio; V. Liberali; F. Palombo; C. Andreoli; L. Gaioni; E. Pozzati; L. Ratti; V. Speziali; D. Gamba; G. Giraudo; P. Mereu; G.F. Dalla Betta; G. Soncini; G. Fontana; M. Bomben; L. Bosisio; P. Cristaudo; G. Giacomini; D. Jugovaz; L. Lanceri; I. Rashevskaya; L. Vitale; G. Venier. - In: POS PROCEEDINGS OF SCIENCE. - ISSN 1824-8039. - ELETTRONICO. - RD09:(2009), pp. 038-1-038-9. (Intervento presentato al convegno 9th International Conference on Large Scale Applications and Radiation Hardness of Semiconductor Detectors tenutosi a Firenze nel 30 September - 2 October 2009).
The SuperB Silicon Vertex Tracker
DI SIPIO, RICCARDO;GIACOBBE, BENEDETTO;GABRIELLI, ALESSANDRO;GIORGI, FILIPPO MARIA;SBARRA, CARLA;SEMPRINI CESARI, NICOLA;SPIGHI, ROBERTO;VALENTINETTI, SARA;VILLA, MAURO;ZOCCOLI, ANTONIO;
2009
Abstract
In the current design of the high luminosity SuperB asymmetric e+-e- collider, the center of mass boost is reduced with respect to BaBar and to efficiently perform the time-dependent measurements an improved vertex resolution is required. A vertex tracker based on the layout of the BaBar Silicon Vertex Tracker (SVT) with an additional innermost layer (Layer0) is a design that achieves such a tracking resolution, provided that the extra layer is placed at radius of 1.5 cm from the interaction point, its thickness is less than 1% X0 and it is able to withstand a background rate of several MHz/cm2. The different options for the Layer0 are reviewed, starting from the most technologically mature solution, a high resistivity short strip detector, describing then a smallpitch hybrid pixel detector and finally presenting the most challenging proposal, based on CMOS MAPS.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
