An Application Specific Integrated Circuit (ASIC) designed as front-end electronics for large area monolithic Silicon Drift Detectors (SDD) read-out has been developed and tested. The challenging framework of this project is the read-out of the large-area SDD detectors to be used for X-ray astronomy space missions and medical applications. Due to the inherent low noise of the SDD, these detectors are able to find application in payloads where instruments capable of good energy resolution combined with position resolution and large area are needed. The ASIC has been tested with a SDD prototype having a sensitive area of 4.35×7.02 cm2. The SDD was designed to test both the spectroscopic and imaging performance with different anode pitches (967 μm and 147 μm, respectively) being able to fulfill stringent constraints on low-noise (< 19 e- rms and < 15 er. m.s., respectively) and low-power (< 0.65 mW/ch). The ASIC prototypes were integrated on specially developed high technology PCB hosting also the SDD. Results of the tests on the ASIC, both stand alone and when connected to the detector, are presented in this work. © 2013 IEEE.

Characterization of the VEGA ASIC dedicated to large area position-sensitive SDDs for space and medical applications

Fuschino F.;Andreani L.;Baldazzi G.
Investigation
;
2013

Abstract

An Application Specific Integrated Circuit (ASIC) designed as front-end electronics for large area monolithic Silicon Drift Detectors (SDD) read-out has been developed and tested. The challenging framework of this project is the read-out of the large-area SDD detectors to be used for X-ray astronomy space missions and medical applications. Due to the inherent low noise of the SDD, these detectors are able to find application in payloads where instruments capable of good energy resolution combined with position resolution and large area are needed. The ASIC has been tested with a SDD prototype having a sensitive area of 4.35×7.02 cm2. The SDD was designed to test both the spectroscopic and imaging performance with different anode pitches (967 μm and 147 μm, respectively) being able to fulfill stringent constraints on low-noise (< 19 e- rms and < 15 er. m.s., respectively) and low-power (< 0.65 mW/ch). The ASIC prototypes were integrated on specially developed high technology PCB hosting also the SDD. Results of the tests on the ASIC, both stand alone and when connected to the detector, are presented in this work. © 2013 IEEE.
IEEE Nuclear Science Symposium Conference Record
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Fuschino F.; Campana R.; Evangelista Y.; Ahangarianabhari M.; Andreani L.; Grassi M.; Bertuccio G.; Malcovati P.; Favre Y.; Zuffa M.; Baldazzi G.; Del Monte E.; Feroci M.; Labanti C.; Marisaldi M.; Muleri F.; Rachevski A.; Rashevskaya I.; Vacchi A.; Zampa G.; Zampa N.; Piemonte C.; Giacomini G.; Picciotto A.; Boscardin M.
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11585/871173
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