In this paper, we present a new network protocol and methodology to enhance the configuration phase of the SpiNNaker spiking neural network hardware simulator. We have developed a system able to accept and process on-board a set of configuration primitives (data specification) encapsulated into ad-hoc packets, avoiding the management of chip memory from the host computer. We performed a study of the data specification generator implemented in the host software library. Afterwards, we extended the currently on-board data specification executor to cope with the newly-formed packets. The use of UDP protocol presents challenges due to its intrinsic unreliability. Furthermore, the presence of a single Ethernet link per board, and the requirement for a dedicated processor to handle all Ethernet communications limit the available communication bandwidth. A set of simulations was performed in order to tune the protocol parameters and to study the trade-offs between transmission speed and reliability. We were able to reach a throughput of a packet every 250 μs, which corresponds to a bandwidth of ~10 Mb/s. This system is able to open new perspectives for the SpiNNaker architecture. Thus, including the reduction of the time required to configure a simulation, the ability to configure more instances of a simulation. This system could even to enable the simulation of neurogenesis.
SIINO, A., BARCHI, F., Davies, S., URGESE, G., ACQUAVIVA, A. (2016). Data and Commands Communication Protocol for Neuromorphic Platform Configuration. Institute of Electrical and Electronics Engineers Inc. [10.1109/MCSoC.2016.41].
Data and Commands Communication Protocol for Neuromorphic Platform Configuration
BARCHI, FRANCESCO
Co-primo
;ACQUAVIVA, ANDREA
2016
Abstract
In this paper, we present a new network protocol and methodology to enhance the configuration phase of the SpiNNaker spiking neural network hardware simulator. We have developed a system able to accept and process on-board a set of configuration primitives (data specification) encapsulated into ad-hoc packets, avoiding the management of chip memory from the host computer. We performed a study of the data specification generator implemented in the host software library. Afterwards, we extended the currently on-board data specification executor to cope with the newly-formed packets. The use of UDP protocol presents challenges due to its intrinsic unreliability. Furthermore, the presence of a single Ethernet link per board, and the requirement for a dedicated processor to handle all Ethernet communications limit the available communication bandwidth. A set of simulations was performed in order to tune the protocol parameters and to study the trade-offs between transmission speed and reliability. We were able to reach a throughput of a packet every 250 μs, which corresponds to a bandwidth of ~10 Mb/s. This system is able to open new perspectives for the SpiNNaker architecture. Thus, including the reduction of the time required to configure a simulation, the ability to configure more instances of a simulation. This system could even to enable the simulation of neurogenesis.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.