A fast continuous sampling digitizer has been designed to acquire fast scintillating detector signalfrom cerium activated lantanum bromide (LaBr3(Ce)) scintillation crystal. These are foreseenin the FAMU experiment which is aimed at spectroscopic measurements of muonic hydrogen,possibly providing insights into the so-called proton radius puzzle. The board, named GSPS,is implemented as an FMC mezzanine which hosts two off-the-shelf sampling ADC used in in-terleaved timing architecture, achieving a 1 GS/s sampling rate (with a 12-bit nominal accuracyover the first Nyquist interval of frequencies, ranging from DC to 500 MHz). Interleaved tech-nique allowed us to keep both lower production costs and simple acquisition system avoidingcomplex interface protocols like JESD204. The board will be described; the test setup and theused methodology to characterize the device will be explained; the achieved performances willbe shown and discussed. In particular it will be pointed out how the two interleaved ADCs can becalibrated in order to get the best performance. The different contributions to both noise and dis-tortion affecting the device will be analyzed applying general techniques for high-sampling-speedcontinuous ADCs. Lastly, future improvements will be introduced: in particular, the solutions weforesee to get a effective number of bits of about 10 over the whole first Nyquist interval will beenlightened.

A 1 GS/s sampling digitizer designed with interleaved architecture (GSPS) for the LaBr3 detectors of the FAMU experiment

Travaglini Riccardo
Investigation
;
Baldazzi Giuseppe
Project Administration
;
Rignanese Luigi Pio;
2019

Abstract

A fast continuous sampling digitizer has been designed to acquire fast scintillating detector signalfrom cerium activated lantanum bromide (LaBr3(Ce)) scintillation crystal. These are foreseenin the FAMU experiment which is aimed at spectroscopic measurements of muonic hydrogen,possibly providing insights into the so-called proton radius puzzle. The board, named GSPS,is implemented as an FMC mezzanine which hosts two off-the-shelf sampling ADC used in in-terleaved timing architecture, achieving a 1 GS/s sampling rate (with a 12-bit nominal accuracyover the first Nyquist interval of frequencies, ranging from DC to 500 MHz). Interleaved tech-nique allowed us to keep both lower production costs and simple acquisition system avoidingcomplex interface protocols like JESD204. The board will be described; the test setup and theused methodology to characterize the device will be explained; the achieved performances willbe shown and discussed. In particular it will be pointed out how the two interleaved ADCs can becalibrated in order to get the best performance. The different contributions to both noise and dis-tortion affecting the device will be analyzed applying general techniques for high-sampling-speedcontinuous ADCs. Lastly, future improvements will be introduced: in particular, the solutions weforesee to get a effective number of bits of about 10 over the whole first Nyquist interval will beenlightened.
Proceedings, Topical Workshop on Electronics forParticle Physics (TWEPP18): Antwerpen, Belgium, September17-21, 2018
17
21
Travaglini Riccardo, Baldazzi Giuseppe, D'Antone Ignazio, Meneghini Stefano, Rignanese Luigi Pio, Zuffa, Mirco
File in questo prodotto:
Eventuali allegati, non sono esposti

I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.

Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11585/705216
 Attenzione

Attenzione! I dati visualizzati non sono stati sottoposti a validazione da parte dell'ateneo

Citazioni
  • ???jsp.display-item.citation.pmc??? ND
  • Scopus ND
  • ???jsp.display-item.citation.isi??? ND
social impact