A PLL-based approach to clock synchronization for trajectory rebuilding in event-triggered communication systems.

In this paper the problem of the temporal characteristics preservation of a sampled trajectory after its data transmission is faced. The considered system consists of one master node, the sender of the sampled data, and one slave node, the receiver. An event-triggered philosophy is adopted for the communication system, without any kind of data time-stamping procedure. After an initial analysis of the system and the signals of interest, it is developed a simple interface, able to overcome at the same time typical problems, like drift, jitter and data flow control, in clock synchronization and data communication. This interface implements a controller based on the well-known phaselocking technique. At last, simulations show the efficiency of this approach.