This paper presents a novel and efficient algorithm to compute fractional band spectrum digital decomposition without using fast Fourier transformation (FFT). The algorithm is optimized for fixed point architectures in order to reduce the required computational power. It is based on lattice coupled all-pass IIR digital filters, downsampling and recursive techniques. Hence the proposed algorithm is capable of computing up to third band spectrum analysis on low cost processors. Though fixed-point arithmetic is used the spectrum analysis may be performed at very low frequency, irrespective of the sampling frequency, and very narrow band pass filters can be realized. The latter features are critical to achieve with traditional IIR structures. The proposed algorithm is patent pending.

Efficient implementation of a spectrum analyzer for fixed point architectures / Valdessalici, A.; Frassi, G.; Bellini, A.. - ELETTRONICO. - V:(2005), pp. 109-112. (Intervento presentato al convegno IEEE International Conference on Acoustics, Speech, and Signal Processing, 2005. Proceedings. (ICASSP '05). tenutosi a Philadelphia, USA nel March 2005) [10.1109/ICASSP.2005.1416252].

Efficient implementation of a spectrum analyzer for fixed point architectures

BELLINI, ALBERTO
2005

Abstract

This paper presents a novel and efficient algorithm to compute fractional band spectrum digital decomposition without using fast Fourier transformation (FFT). The algorithm is optimized for fixed point architectures in order to reduce the required computational power. It is based on lattice coupled all-pass IIR digital filters, downsampling and recursive techniques. Hence the proposed algorithm is capable of computing up to third band spectrum analysis on low cost processors. Though fixed-point arithmetic is used the spectrum analysis may be performed at very low frequency, irrespective of the sampling frequency, and very narrow band pass filters can be realized. The latter features are critical to achieve with traditional IIR structures. The proposed algorithm is patent pending.
2005
Proceedings of IEEE International Conference on Acoustics, Speech, and Signal Processing, 2005. Proceedings. (ICASSP '05).
109
112
Efficient implementation of a spectrum analyzer for fixed point architectures / Valdessalici, A.; Frassi, G.; Bellini, A.. - ELETTRONICO. - V:(2005), pp. 109-112. (Intervento presentato al convegno IEEE International Conference on Acoustics, Speech, and Signal Processing, 2005. Proceedings. (ICASSP '05). tenutosi a Philadelphia, USA nel March 2005) [10.1109/ICASSP.2005.1416252].
Valdessalici, A.; Frassi, G.; Bellini, A.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11585/517046
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