Nowadays Smart Power technologies are demanding smarter devices to give the opportunity of end-user customizations to reach best-in-class efficiency in applications such as sensing and power conversions. Reconfigurable devices – in the form of embedded FPGA (eFPGA) – can represent an effective solution to address such demand. Differently from CMOS world, where reconfigurable technologies have been widely proposed in the last two decades to couple flexibility and NRE costs reduction, eFPGAs targeting Smart Power applications is a new challenge that we can face today thanks to recent improvement of the digital capabilities of such technologies. In this paper we explore the implementation of a soft-core eFPGA tailored for Smart Power applications targeting STMicroelectronics BCD9s 0.11 μm technology. Area-optimized and speed-optimized implementations prove the existence of a significant design space, both in terms of area (~15%) and speed (~50%) variation. A set of benchmarking applications representative of different smart power fields (sigma-delta modulation, power management and motion control) have been mapped on a 16 CLBs eFPGA; the performance are discussed showing the potential added-value provided by reconfigurability.
Matteo Cuppini, Eleonora Franchi Scarselli, Claudio Mucci, Roberto Canegallo (2014). Soft-Core eFPGA for Smart Power Applications. NEW YORK : IEEE [10.1109/ISSOC.2014.6972431].
Soft-Core eFPGA for Smart Power Applications
CUPPINI, MATTEO;FRANCHI SCARSELLI, ELEONORA;
2014
Abstract
Nowadays Smart Power technologies are demanding smarter devices to give the opportunity of end-user customizations to reach best-in-class efficiency in applications such as sensing and power conversions. Reconfigurable devices – in the form of embedded FPGA (eFPGA) – can represent an effective solution to address such demand. Differently from CMOS world, where reconfigurable technologies have been widely proposed in the last two decades to couple flexibility and NRE costs reduction, eFPGAs targeting Smart Power applications is a new challenge that we can face today thanks to recent improvement of the digital capabilities of such technologies. In this paper we explore the implementation of a soft-core eFPGA tailored for Smart Power applications targeting STMicroelectronics BCD9s 0.11 μm technology. Area-optimized and speed-optimized implementations prove the existence of a significant design space, both in terms of area (~15%) and speed (~50%) variation. A set of benchmarking applications representative of different smart power fields (sigma-delta modulation, power management and motion control) have been mapped on a 16 CLBs eFPGA; the performance are discussed showing the potential added-value provided by reconfigurability.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
