The architecture of the data acquisition system foreseen for the LHCb upgrade, to be installed by 2018, is devised to readout events trigger-less, synchronously with the LHC bunch crossing rate at 40 MHz. Within this approach the readout boards act as a bridge between the front-end electronics and the High Level Trigger (HLT) computing farm. The baseline design for the LHCb readout is an ATCA board requiring dedicated crates. A local area standard network protocol is implemented in the on-board FPGAs to read out the data. The alternative solution proposed here consists in building the readout boards as PCIe peripherals of the event-builder servers. The main architectural advantage is that protocol and link-technology of the event-builder can be left open until very late, to profit from the most cost-effective industry technology available at the time of the LHC LS2.

M. Bellato, G. Collazuol, I. D’Antone, P. Durante, D. Galli, B. Jost, et al. (2014). A PCIe Gen3 Based Readout for the LHCb Upgrade. JOURNAL OF PHYSICS. CONFERENCE SERIES, 513(1), 1-7 [10.1088/1742-6596/513/1/012023].

A PCIe Gen3 Based Readout for the LHCb Upgrade

GALLI, DOMENICO;VAGNONI, VINCENZO MARIA
2014

Abstract

The architecture of the data acquisition system foreseen for the LHCb upgrade, to be installed by 2018, is devised to readout events trigger-less, synchronously with the LHC bunch crossing rate at 40 MHz. Within this approach the readout boards act as a bridge between the front-end electronics and the High Level Trigger (HLT) computing farm. The baseline design for the LHCb readout is an ATCA board requiring dedicated crates. A local area standard network protocol is implemented in the on-board FPGAs to read out the data. The alternative solution proposed here consists in building the readout boards as PCIe peripherals of the event-builder servers. The main architectural advantage is that protocol and link-technology of the event-builder can be left open until very late, to profit from the most cost-effective industry technology available at the time of the LHC LS2.
2014
M. Bellato, G. Collazuol, I. D’Antone, P. Durante, D. Galli, B. Jost, et al. (2014). A PCIe Gen3 Based Readout for the LHCb Upgrade. JOURNAL OF PHYSICS. CONFERENCE SERIES, 513(1), 1-7 [10.1088/1742-6596/513/1/012023].
M. Bellato; G. Collazuol; I. D’Antone; P. Durante; D. Galli; B. Jost; I. Lax; G. Liu; U. Marconi; N. Neufeld; R. Schwemmer; V. Vagnoni
File in questo prodotto:
Eventuali allegati, non sono esposti

I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.

Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11585/353718
 Attenzione

Attenzione! I dati visualizzati non sono stati sottoposti a validazione da parte dell'ateneo

Citazioni
  • ???jsp.display-item.citation.pmc??? ND
  • Scopus 23
  • ???jsp.display-item.citation.isi??? 18
social impact