The architecture of the data acquisition system foreseen for the LHCb upgrade, to be installed by 2018, is devised to readout events trigger-less, synchronously with the LHC bunch crossing rate at 40 MHz. Within this approach the readout boards act as a bridge between the front-end electronics and the High Level Trigger (HLT) computing farm. The baseline design for the LHCb readout is an ATCA board requiring dedicated crates. A local area standard network protocol is implemented in the on-board FPGAs to read out the data. The alternative solution proposed here consists in building the readout boards as PCIe peripherals of the event-builder servers. The main architectural advantage is that protocol and link-technology of the event-builder can be left open until very late, to profit from the most cost-effective industry technology available at the time of the LHC LS2.

A PCIe Gen3 Based Readout for the LHCb Upgrade / M. Bellato; G. Collazuol; I. D’Antone; P. Durante; D. Galli; B. Jost; I. Lax; G. Liu; U. Marconi; N. Neufeld; R. Schwemmer; V. Vagnoni. - In: JOURNAL OF PHYSICS. CONFERENCE SERIES. - ISSN 1742-6588. - STAMPA. - 513:1(2014), pp. 012023.1-012023.7. [10.1088/1742-6596/513/1/012023]

A PCIe Gen3 Based Readout for the LHCb Upgrade

GALLI, DOMENICO;VAGNONI, VINCENZO MARIA
2014

Abstract

The architecture of the data acquisition system foreseen for the LHCb upgrade, to be installed by 2018, is devised to readout events trigger-less, synchronously with the LHC bunch crossing rate at 40 MHz. Within this approach the readout boards act as a bridge between the front-end electronics and the High Level Trigger (HLT) computing farm. The baseline design for the LHCb readout is an ATCA board requiring dedicated crates. A local area standard network protocol is implemented in the on-board FPGAs to read out the data. The alternative solution proposed here consists in building the readout boards as PCIe peripherals of the event-builder servers. The main architectural advantage is that protocol and link-technology of the event-builder can be left open until very late, to profit from the most cost-effective industry technology available at the time of the LHC LS2.
2014
A PCIe Gen3 Based Readout for the LHCb Upgrade / M. Bellato; G. Collazuol; I. D’Antone; P. Durante; D. Galli; B. Jost; I. Lax; G. Liu; U. Marconi; N. Neufeld; R. Schwemmer; V. Vagnoni. - In: JOURNAL OF PHYSICS. CONFERENCE SERIES. - ISSN 1742-6588. - STAMPA. - 513:1(2014), pp. 012023.1-012023.7. [10.1088/1742-6596/513/1/012023]
M. Bellato; G. Collazuol; I. D’Antone; P. Durante; D. Galli; B. Jost; I. Lax; G. Liu; U. Marconi; N. Neufeld; R. Schwemmer; V. Vagnoni
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11585/353718
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