Current sensing readout is one of the most frequent techniques used in biosensing due to the charge-transfer phenomena occurring at solid-liquid interfaces. The development of novel nanodevices for biosensing determines new challenges for electronic interface design based on current sensing, especially when compact and efficient arrays need to be organized, such as in recent trends of rapid label-free electronic detection of DNA synthesis. This paper will review the basic noise limitations of current sensing interfaces with particular emphasis on integrated CMOS technology. Starting from the basic theory, the paper presents, investigates and compares charge-sensitive amplifier architectures used in both continuous-time and discrete-time approaches, along with their design trade-offs involving noise floor, sensitivity to stray capacitance and bandwidth. The ultimate goal of this review is providing analog designers with helpful design rules and analytical tools. Also, in order to present a comprehensive overview of the state-of-the-art, the most relevant papers recently appeared in the literature about this topic are discussed and compared.
M. Crescentini, M. Bennati, M. Carminati, M. Tartagni (2014). Noise Limits of CMOS Current Interfaces for Biosensors: A Review. IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS, 8(2), 1-15 [10.1109/TBCAS.2013.2262998].
Noise Limits of CMOS Current Interfaces for Biosensors: A Review
CRESCENTINI, MARCO;BENNATI, MARCO;TARTAGNI, MARCO
2014
Abstract
Current sensing readout is one of the most frequent techniques used in biosensing due to the charge-transfer phenomena occurring at solid-liquid interfaces. The development of novel nanodevices for biosensing determines new challenges for electronic interface design based on current sensing, especially when compact and efficient arrays need to be organized, such as in recent trends of rapid label-free electronic detection of DNA synthesis. This paper will review the basic noise limitations of current sensing interfaces with particular emphasis on integrated CMOS technology. Starting from the basic theory, the paper presents, investigates and compares charge-sensitive amplifier architectures used in both continuous-time and discrete-time approaches, along with their design trade-offs involving noise floor, sensitivity to stray capacitance and bandwidth. The ultimate goal of this review is providing analog designers with helpful design rules and analytical tools. Also, in order to present a comprehensive overview of the state-of-the-art, the most relevant papers recently appeared in the literature about this topic are discussed and compared.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.