A Shared Access Platform to Photonic Integrated Resources (SAPPHIRE) is presented, which aims to become the first national infrastructure enabling a shared access of different users to a generic silicon photonic foundry. The platform is based on the concept of high-level circuit design for photonic integrated circuits (PICs), where complex architectures can be designed without a specific knowledge of either electromagnetic (EM) or technological issues, but simply operating at the circuit level on a selected set of elementary functional elements, named building blocks (BBs). The main roles of the SAPPHIRE platform in the foundry-Users interactions are discussed, as well as the concept of photonic BBs and circuit simulation. Results on a proof-of-concept device are shown to demonstrate the validity of the high-level circuit design for PICs.
SAPPHIRE: A GENERIC FOUNDRY PLATFORM FOR SILICON PHOTONICS / F. Morichetti; A. Canciamilla; S. Grillanda; P. Orlandi; S. Malaguti; M. J. Strain; M. Sorel; G. Bellanca; P. Bassi; A. Melloni. - ELETTRONICO. - (2012), pp. 410-413. (Intervento presentato al convegno IX RiNEm, Riunione Nazionale di Elettromagnetismo tenutosi a Roma nel 10 - 14 settembre 2012).
SAPPHIRE: A GENERIC FOUNDRY PLATFORM FOR SILICON PHOTONICS
ORLANDI, PIERO;BASSI, PAOLO;
2012
Abstract
A Shared Access Platform to Photonic Integrated Resources (SAPPHIRE) is presented, which aims to become the first national infrastructure enabling a shared access of different users to a generic silicon photonic foundry. The platform is based on the concept of high-level circuit design for photonic integrated circuits (PICs), where complex architectures can be designed without a specific knowledge of either electromagnetic (EM) or technological issues, but simply operating at the circuit level on a selected set of elementary functional elements, named building blocks (BBs). The main roles of the SAPPHIRE platform in the foundry-Users interactions are discussed, as well as the concept of photonic BBs and circuit simulation. Results on a proof-of-concept device are shown to demonstrate the validity of the high-level circuit design for PICs.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
