Multiprocesso system-on-chip (MPSoC) open notable perspectives in the design of highly targeted embedded solutions for real-time multi-tasking applications. The eterogeneity of available platforms, however, often hinders plain applicability of efficient schedulng policies, particularly in the case of loosely-coupled architectures which do not provide any support for inter-processor task migration. In this paper we present a portable software nfrastructure addressing the global scheduling of periodic real-time tasks on such platforms. We show that global scheduling policies, under the restricted-migration model, are applicable also on asymmetric multiprocessing systems and experimentally evaluate the validity of the approach using different FPGA-based confiurations that recall manifold architectures of commercial MPSoCs.
A portable infrastructure supporting global scheduling of embedded real-time applications on asymmetric MPSoCs / Faldella E.; Tucci P.. - STAMPA. - LNCS 7017:(2011), pp. 331-342. (Intervento presentato al convegno 11th International Conference on Algorithms and Architectures for Parallel Processing, ICA3PP (2) 2011 tenutosi a Melbourne, Australia nel 24-26 Ottobre 2011) [10.1007/978-3-642-24669-2_32].
A portable infrastructure supporting global scheduling of embedded real-time applications on asymmetric MPSoCs
FALDELLA, EUGENIO;TUCCI, PRIMIANO
2011
Abstract
Multiprocesso system-on-chip (MPSoC) open notable perspectives in the design of highly targeted embedded solutions for real-time multi-tasking applications. The eterogeneity of available platforms, however, often hinders plain applicability of efficient schedulng policies, particularly in the case of loosely-coupled architectures which do not provide any support for inter-processor task migration. In this paper we present a portable software nfrastructure addressing the global scheduling of periodic real-time tasks on such platforms. We show that global scheduling policies, under the restricted-migration model, are applicable also on asymmetric multiprocessing systems and experimentally evaluate the validity of the approach using different FPGA-based confiurations that recall manifold architectures of commercial MPSoCs.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.