This paper presents an enhanced circuit-theoretic method for fault location in radial distribution networks equipped with sparse phasor measurement units (PMUs). The approach operates directly on the network admittance matrix and exploits the propagation of voltage-change phasors to first identify the bus closest to the fault, followed by a stage that either pinpoints the fault within a line section or returns a compact search region. Compared with existing methods, the proposed formulation removes the restriction that PMUs must be placed only at specific nodes and eliminates the need for redundant measurements. A previous version limited to feeder-terminal PMU placements is extended to realistic internal PMU configurations by combining Kron reduction with a topology model that distinguishes main-branch paths, observed and unobserved laterals, and PMU-bounded buses. The method accommodates common fault types and a broad range of fault resistances. Simulations on a real 13.8 kV, 134-bus feeder with ten PMUs - mostly located on internal buses - show that the method reliably identifies the faulted area and achieves high-accuracy pinpointing when unique localization is possible. Performance remains robust under practical deployment scenarios and realistic PMU noise levels.

Noori, F., Peretto, L., Bartolucci, M., Petrianni, L., Mingotti, A., Tinarelli, R. (2026). A Circuit-Theory-Based Approach for Fault Location in Distribution Power Networks Using Sparse PMUs. Piscataway : Institute of Electrical and Electronics Engineers Inc. [10.1109/sgsma65955.2026.11618782].

A Circuit-Theory-Based Approach for Fault Location in Distribution Power Networks Using Sparse PMUs

Noori, Fardin;Peretto, Lorenzo;Mingotti, Alessandro;Tinarelli, Roberto
2026

Abstract

This paper presents an enhanced circuit-theoretic method for fault location in radial distribution networks equipped with sparse phasor measurement units (PMUs). The approach operates directly on the network admittance matrix and exploits the propagation of voltage-change phasors to first identify the bus closest to the fault, followed by a stage that either pinpoints the fault within a line section or returns a compact search region. Compared with existing methods, the proposed formulation removes the restriction that PMUs must be placed only at specific nodes and eliminates the need for redundant measurements. A previous version limited to feeder-terminal PMU placements is extended to realistic internal PMU configurations by combining Kron reduction with a topology model that distinguishes main-branch paths, observed and unobserved laterals, and PMU-bounded buses. The method accommodates common fault types and a broad range of fault resistances. Simulations on a real 13.8 kV, 134-bus feeder with ten PMUs - mostly located on internal buses - show that the method reliably identifies the faulted area and achieves high-accuracy pinpointing when unique localization is possible. Performance remains robust under practical deployment scenarios and realistic PMU noise levels.
2026
2026 5th International Conference on Smart Grid Synchronized Measurements and Analytics, SGSMA 2026
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Noori, F., Peretto, L., Bartolucci, M., Petrianni, L., Mingotti, A., Tinarelli, R. (2026). A Circuit-Theory-Based Approach for Fault Location in Distribution Power Networks Using Sparse PMUs. Piscataway : Institute of Electrical and Electronics Engineers Inc. [10.1109/sgsma65955.2026.11618782].
Noori, Fardin; Peretto, Lorenzo; Bartolucci, Massimo; Petrianni, Luigi; Mingotti, Alessandro; Tinarelli, Roberto
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11585/1080055
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