THE continuous scaling of microelectronic technology, while allowing to integrate increasingly complex and high performance systems on a die, poses new challenges to their reliable operation in the field, due to the increased likelihood of faults and aging phenomena possibly occurring in the field and compromising the system’s correct operation. Several on-line testing and error/fault resilience techniques have been employed in the past to implement highly reliable, fault tolerant systems for mission critical applications, in areas like space, military, automotive, medical, banking, etc. However, new faults and aging phenomena occurring in the field are posing unique on-line testing and error/fault resilience challenges even for mainstream applications, where cost is a crucial factor. This mandates the development and adoption of innovative solutions optimized for cost, power and area.

Guest Editors' Introduction: Special Section on Concurrent On-Line Testing and Error/Fault Resilience of Digital Systems / C. Metra; R. Galivanche. - STAMPA. - (2011), pp. 1217-1218. [10.1109/TC.2011.135]

Guest Editors' Introduction: Special Section on Concurrent On-Line Testing and Error/Fault Resilience of Digital Systems

METRA, CECILIA;
2011

Abstract

THE continuous scaling of microelectronic technology, while allowing to integrate increasingly complex and high performance systems on a die, poses new challenges to their reliable operation in the field, due to the increased likelihood of faults and aging phenomena possibly occurring in the field and compromising the system’s correct operation. Several on-line testing and error/fault resilience techniques have been employed in the past to implement highly reliable, fault tolerant systems for mission critical applications, in areas like space, military, automotive, medical, banking, etc. However, new faults and aging phenomena occurring in the field are posing unique on-line testing and error/fault resilience challenges even for mainstream applications, where cost is a crucial factor. This mandates the development and adoption of innovative solutions optimized for cost, power and area.
2011
IEEE TRANSACTIONS ON COMPUTERS
1217
1218
Guest Editors' Introduction: Special Section on Concurrent On-Line Testing and Error/Fault Resilience of Digital Systems / C. Metra; R. Galivanche. - STAMPA. - (2011), pp. 1217-1218. [10.1109/TC.2011.135]
C. Metra; R. Galivanche
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11585/106889
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