NADALINI, ALESSANDRO
NADALINI, ALESSANDRO
CENTRO RICERCA SISTEMI ELETTRONICI INGEGN.INF. E TELECOM."ERCOLE DE CASTRO"
Assegnisti
A Heterogeneous RISC-V Based SoC for Secure Nano-UAV Navigation
2024 Valente, Luca; Nadalini, Alessandro; Veeran, Asif Hussain Chiralil; Sinigaglia, Mattia; Sá, Bruno; Wistoff, Nils; Tortorella, Yvan; Benatti, Simone; Psiakis, Rafail; Kulmala, Ari; Mohammad, Baker; Pinto, Sandro; Palossi, Daniele; Benini, Luca; Rossi, Davide
A 3 TOPS/W RISC-V Parallel Cluster for Inference of Fine-Grain Mixed-Precision Quantized Neural Networks
2023 Nadalini, A; Rutishauser, G; Burrello, A; Bruschi, N; Garofalo, A; Benini, L; Conti, F; Rossi, D
Shaheen: An Open, Secure, and Scalable RV64 SoC for Autonomous Nano-UAVs
2023 Valente, L.; Veeran, A.; Sinigaglia, M.; Tortorella, Y.; Nadalini, A.; Wistoff, N.; Sá, B.; Garofalo, A.; Psiakis, R.; Tolba, M.; Kulmala, A.; Limaye, N.; Sinanoglu, O.; Pinto, S.; Palossi, D.; Benini, L.; Mohammad, B.; Rossi, D.
Darkside: 2.6GFLOPS, 8.7mW Heterogeneous RISC-V Cluster for Extreme-Edge On-Chip DNN Inference and Training
2022 Angelo Garofalo; Matteo Perotti; Luca Valente; Yvan Tortorella; Alessandro Nadalini; Luca Benini; Davide Rossi; Francesco Conti
Darkside: A Heterogeneous RISC-V Compute Cluster for Extreme-Edge On-Chip DNN Inference and Training
2022 Garofalo, Angelo; Tortorella, Yvan; Perotti, Matteo; Valente, Luca; Nadalini, Alessandro; Benini, Luca; Rossi, Davide; Conti, Francesco
| Titolo | Autore(i) | Anno | Periodico | Editore | Tipo | File |
|---|---|---|---|---|---|---|
| A Heterogeneous RISC-V Based SoC for Secure Nano-UAV Navigation | Valente, Luca; Nadalini, Alessandro; Veeran, Asif Hussain Chiralil; Sinigaglia, Mattia; Sá, Bruno...; Wistoff, Nils; Tortorella, Yvan; Benatti, Simone; Psiakis, Rafail; Kulmala, Ari; Mohammad, Baker; Pinto, Sandro; Palossi, Daniele; Benini, Luca; Rossi, Davide | 2024-01-01 | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS | - | 1.01 Articolo in rivista | SHAHEEN_TCAS_I_2023.pdf |
| A 3 TOPS/W RISC-V Parallel Cluster for Inference of Fine-Grain Mixed-Precision Quantized Neural Networks | Nadalini, A; Rutishauser, G; Burrello, A; Bruschi, N; Garofalo, A; Benini, L; Conti, F; Rossi, D | 2023-01-01 | - | IEEE | 4.01 Contributo in Atti di convegno | a 3 tops w risc post print .pdf |
| Shaheen: An Open, Secure, and Scalable RV64 SoC for Autonomous Nano-UAVs | Valente, L.; Veeran, A.; Sinigaglia, M.; Tortorella, Y.; Nadalini, A.; Wistoff, N.; Sá, B.; Garof...alo, A.; Psiakis, R.; Tolba, M.; Kulmala, A.; Limaye, N.; Sinanoglu, O.; Pinto, S.; Palossi, D.; Benini, L.; Mohammad, B.; Rossi, D. | 2023-01-01 | - | - | 4.03 Poster | - |
| Darkside: 2.6GFLOPS, 8.7mW Heterogeneous RISC-V Cluster for Extreme-Edge On-Chip DNN Inference and Training | Angelo Garofalo; Matteo Perotti; Luca Valente; Yvan Tortorella; Alessandro Nadalini; Luca Benini;... Davide Rossi; Francesco Conti | 2022-01-01 | - | - | 4.01 Contributo in Atti di convegno | - |
| Darkside: A Heterogeneous RISC-V Compute Cluster for Extreme-Edge On-Chip DNN Inference and Training | Garofalo, Angelo; Tortorella, Yvan; Perotti, Matteo; Valente, Luca; Nadalini, Alessandro; Benini,... Luca; Rossi, Davide; Conti, Francesco | 2022-01-01 | IEEE OPEN JOURNAL OF SOLID-STATE CIRCUITS | - | 1.01 Articolo in rivista | Darkside_A_Heterogeneous_RISC-V_Compute_Cluster_for_Extreme-Edge_On-Chip_DNN_Inference_and_Training.pdf |