Architecture and process for emulating a non-volatile intermittent processing system using a standard fpga platform

An architecture (10) on a standard FPGA platform is described, for the emulation of a non-volatile intermittent processing system comprising three auxiliary blocks: an intermittent power supply emulator block (11) which reproduces the trends of a typical irregular power supply coming from environmental energy conversion systems; a non-volatile logic emulation block (21) which realizes the persistence of information in the non-volatile registers in the event of a power failure in the architecture, as well as reproduces the delays of the read/write operations; an energy consumption estimator block (31) which estimates the energy consumption of the digital circuits, architectures and projects to be emulated; a process on a standard FPGA platform for the emulation of a non-volatile intermittent processing system is also described.