In this paper we propose an on-die monitoring scheme to detect and count transient faults (TFs) resulting, as well as not resulting in output SEs, affecting the inputs of data-path latches/flip-flops. This approach allows an early monitoring of the latches/flip-flops vulnerability to TFs, thus discovering intrinsic weaknesses of design or process. The proposed monitoring scheme features a very low impact on area overhead and power consumption, thus being suitable to be deployed within any IC.
Transient Fault and Soft Error On-Die Monitoring Scheme / D. Rossi; M. Omaña; C. Metra. - STAMPA. - (2010), pp. 391-398. (Intervento presentato al convegno The 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems tenutosi a Kyoto, Japan nel 6-8 October 2010) [10.1109/DFT.2010.53].
Transient Fault and Soft Error On-Die Monitoring Scheme
ROSSI, DANIELE;OMANA, MARTIN EUGENIO;METRA, CECILIA
2010
Abstract
In this paper we propose an on-die monitoring scheme to detect and count transient faults (TFs) resulting, as well as not resulting in output SEs, affecting the inputs of data-path latches/flip-flops. This approach allows an early monitoring of the latches/flip-flops vulnerability to TFs, thus discovering intrinsic weaknesses of design or process. The proposed monitoring scheme features a very low impact on area overhead and power consumption, thus being suitable to be deployed within any IC.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
