This brief proposes a neural network for the solution in real time of a class of quadratic optimization problems with equality and inequality constraints arising in code-division multiple access (CDMA) communication systems. The network, which is derived via a nonobvious modification of the circuit for nonlinear programming introduced by Kennedy and Chua, is shown to be globally asymptotically stable, and as such is able to compute the global optimal solution in real time, without the risk of spurious responses. Computer simulations are presented to verify the neural network optimization capabilities and speed, and the performance in the application to CDMA communication systems.

A neural network for constrained optimization with application to CDMA communication systems / Fantacci R.; Forti M.; Marini M.; Tarchi D.; Vannuccini G.. - In: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. 2, ANALOG AND DIGITAL SIGNAL PROCESSING. - ISSN 1057-7130. - ELETTRONICO. - 50:8(2003), pp. 484-487. [10.1109/TCSII.2003.814805]

A neural network for constrained optimization with application to CDMA communication systems

Tarchi D.
Primo
;
2003

Abstract

This brief proposes a neural network for the solution in real time of a class of quadratic optimization problems with equality and inequality constraints arising in code-division multiple access (CDMA) communication systems. The network, which is derived via a nonobvious modification of the circuit for nonlinear programming introduced by Kennedy and Chua, is shown to be globally asymptotically stable, and as such is able to compute the global optimal solution in real time, without the risk of spurious responses. Computer simulations are presented to verify the neural network optimization capabilities and speed, and the performance in the application to CDMA communication systems.
2003
A neural network for constrained optimization with application to CDMA communication systems / Fantacci R.; Forti M.; Marini M.; Tarchi D.; Vannuccini G.. - In: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. 2, ANALOG AND DIGITAL SIGNAL PROCESSING. - ISSN 1057-7130. - ELETTRONICO. - 50:8(2003), pp. 484-487. [10.1109/TCSII.2003.814805]
Fantacci R.; Forti M.; Marini M.; Tarchi D.; Vannuccini G.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11585/845344
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