The ANTAREX project relies on a Domain Specific Language (DSL) based on Aspect Oriented Programming (AOP) concepts to allow applications to enforce extra functional properties such as energy-efficiency and performance and to optimize Quality of Service (QoS) in an adaptive way. The DSL approach allows the definition of energy-efficiency, performance, and adaptivity strategies as well as their enforcement at runtime through application autotuning and resource and power management. In this paper, we present an overview of the key outcome of the project, the ANTAREX DSL, and some of its capabilities through a number of examples, including how the DSL is applied in the context of the project use cases.

The ANTAREX domain specific language for high performance computing / Silvano C.; Agosta G.; Bartolini A.; Beccari A.R.; Benini L.; Besnard L.; Bispo J.; Cmar R.; Cardoso J.M.P.; Cavazzoni C.; Cesarini D.; Cherubin S.; Ficarelli F.; Gadioli D.; Golasowski M.; Libri A.; Martinovic J.; Palermo G.; Pinto P.; Rohou E.; Slaninova K.; Vitali E.. - In: MICROPROCESSORS AND MICROSYSTEMS. - ISSN 0141-9331. - ELETTRONICO. - 68:(2019), pp. 58-73. [10.1016/j.micpro.2019.05.005]

The ANTAREX domain specific language for high performance computing

Bartolini A.;Benini L.;Cesarini D.;
2019

Abstract

The ANTAREX project relies on a Domain Specific Language (DSL) based on Aspect Oriented Programming (AOP) concepts to allow applications to enforce extra functional properties such as energy-efficiency and performance and to optimize Quality of Service (QoS) in an adaptive way. The DSL approach allows the definition of energy-efficiency, performance, and adaptivity strategies as well as their enforcement at runtime through application autotuning and resource and power management. In this paper, we present an overview of the key outcome of the project, the ANTAREX DSL, and some of its capabilities through a number of examples, including how the DSL is applied in the context of the project use cases.
2019
The ANTAREX domain specific language for high performance computing / Silvano C.; Agosta G.; Bartolini A.; Beccari A.R.; Benini L.; Besnard L.; Bispo J.; Cmar R.; Cardoso J.M.P.; Cavazzoni C.; Cesarini D.; Cherubin S.; Ficarelli F.; Gadioli D.; Golasowski M.; Libri A.; Martinovic J.; Palermo G.; Pinto P.; Rohou E.; Slaninova K.; Vitali E.. - In: MICROPROCESSORS AND MICROSYSTEMS. - ISSN 0141-9331. - ELETTRONICO. - 68:(2019), pp. 58-73. [10.1016/j.micpro.2019.05.005]
Silvano C.; Agosta G.; Bartolini A.; Beccari A.R.; Benini L.; Besnard L.; Bispo J.; Cmar R.; Cardoso J.M.P.; Cavazzoni C.; Cesarini D.; Cherubin S.; Ficarelli F.; Gadioli D.; Golasowski M.; Libri A.; Martinovic J.; Palermo G.; Pinto P.; Rohou E.; Slaninova K.; Vitali E.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11585/718408
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