The impact of strain and semiconductor/oxide interface traps (ITs) on the turn-on characteristics of a 10x10 nm^2 nanowire (NW) Al0.05Ga0.95Sb/InAs heterojunction n-type tunnel field-effect transistor (TFETs) is carefully investigated using a full-quantum simulator. In order to capture the effect of traps on the device electrostatics in a way consistent with the ballistic approach, the SRH theory has been properly generalized. Our results indicate that the presence of a relatively high IT density can cause a huge current reduction that cannot be recovered exploiting strain. In fact, biaxial tensile strain induces a remarkable current enhancement due to bandgap reduction and tunnel energy alignment at the heterojunction; however, a huge degradation of the ambipolar behavior is also observed.

Impact of strain and interface traps on the performance of III-V nanowire TFETs / Gnani, Elena; Visciarelli, Michele; Gnudi, Antonio; Reggiani, Susanna; Baccarani, Giorgio. - ELETTRONICO. - (2016), pp. 7998897.275-7998897.278. (Intervento presentato al convegno 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 tenutosi a chn nel 2016) [10.1109/ICSICT.2016.7998897].

Impact of strain and interface traps on the performance of III-V nanowire TFETs

Gnani, E.
;
Visciarelli, M.;Gnudi, A.;Reggiani, S.;Baccarani, G.
2016

Abstract

The impact of strain and semiconductor/oxide interface traps (ITs) on the turn-on characteristics of a 10x10 nm^2 nanowire (NW) Al0.05Ga0.95Sb/InAs heterojunction n-type tunnel field-effect transistor (TFETs) is carefully investigated using a full-quantum simulator. In order to capture the effect of traps on the device electrostatics in a way consistent with the ballistic approach, the SRH theory has been properly generalized. Our results indicate that the presence of a relatively high IT density can cause a huge current reduction that cannot be recovered exploiting strain. In fact, biaxial tensile strain induces a remarkable current enhancement due to bandgap reduction and tunnel energy alignment at the heterojunction; however, a huge degradation of the ambipolar behavior is also observed.
2016
2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings
275
278
Impact of strain and interface traps on the performance of III-V nanowire TFETs / Gnani, Elena; Visciarelli, Michele; Gnudi, Antonio; Reggiani, Susanna; Baccarani, Giorgio. - ELETTRONICO. - (2016), pp. 7998897.275-7998897.278. (Intervento presentato al convegno 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 tenutosi a chn nel 2016) [10.1109/ICSICT.2016.7998897].
Gnani, Elena; Visciarelli, Michele; Gnudi, Antonio; Reggiani, Susanna; Baccarani, Giorgio
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11585/610867
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