A new TCAD-based approach is used to investigate hot-carrier stress (HCS) effects, especially suited for power devices. Physically-based degradation models are used to determine the interface trap generation at different stress biases and ambient temperatures. Special attention has been given to the high current-voltage regimes, when significant self-heating effects and impact ionization play a relevant role. By monitoring the linear and saturation regimes of a rugged LDMOS at different stress biases and times, the spatial and energetic distribution of acceptor- and donor-type traps has been investigated for the first time confirming the experimental results.
TCAD predictions of linear and saturation HCS degradation in STI-based LDMOS transistors stressed in the impact-ionization regime
REGGIANI, SUSANNA;BARONE, GAETANO;GNANI, ELENA;GNUDI, ANTONIO;BACCARANI, GIORGIO;
2013
Abstract
A new TCAD-based approach is used to investigate hot-carrier stress (HCS) effects, especially suited for power devices. Physically-based degradation models are used to determine the interface trap generation at different stress biases and ambient temperatures. Special attention has been given to the high current-voltage regimes, when significant self-heating effects and impact ionization play a relevant role. By monitoring the linear and saturation regimes of a rugged LDMOS at different stress biases and times, the spatial and energetic distribution of acceptor- and donor-type traps has been investigated for the first time confirming the experimental results.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.