Sfoglia per Autore  

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Mostrati risultati da 1 a 20 di 157
Titolo Autore(i) Anno Periodico Editore Tipo File
A FPGA Implementation of An Open-Source Floating-Point Computation System C. Brunelli; F. Garzia; J. Nurmi C. Mucci; F. Campi; D. Rossi 2005-01-01 - s.n 4.01 Contributo in Atti di convegno -
A VHDL model and Implementation of a Coarse-Grain Reconfigurable Coprocessor for a RISC Core C. Brunelli; F. Cinelli; D. Rossi; J. Nurmi 2006-01-01 - s.n 4.01 Contributo in Atti di convegno -
Design space exploration of an open-source, IP-reusable, scalable floating-point engine for embedded applications C. Brunelli; F. Campi; C. Mucci; D. Rossi; T. Ahonen; J. Kylliäinen; F. Garzia; J. Nurmi 2008-01-01 JOURNAL OF SYSTEMS ARCHITECTURE - 1.01 Articolo in rivista -
Implementation of a floating-point matrix-vector multiplication on a reconfigurable architecture F. Garzia; C. Brunelli; D. Rossi; J. Nurmi 2008-01-01 - IEEE 4.01 Contributo in Atti di convegno -
A Multi-Core Signal Processor for Heterogeneous Reconfigurable Computing D. Rossi; F. Campi; A. Deledda; C. Mucci; S. Pucillo; S. Whitty; R. Ernst; S. Chevobbe; S. Guyeta...nt; M. Kühnle; M. Hübner; J. Becker; W. Putzke-Roeming 2009-01-01 - IEEE 4.01 Contributo in Atti di convegno -
The Dream Digital Signal Processor: Architecture, programming model and application mapping C. Mucci; D. Rossi; F. Campi; L. Ciccarelli; M. Pizzotti; L. Perugini; L. Vanzolini; T. De Marco;... M. Innocenti 2009-01-01 - Springer 2.01 Capitolo / saggio in libro -
The MORPHEUS Data Communication and Storage Infrastructure F. Campi; A. Deledda; D. Rossi; M. Coppola; L. Pieralisi; R. Locatelli; G. Maruccia; T. De Marco;... F. Ries; M. Kühnle; M. Hübner; J. Becker 2009-01-01 - Springer 2.01 Capitolo / saggio in libro -
A Heterogeneous Digital Signal Processor Implementation for Dynamically Reconfigurable Computing D.Rossi; F.Campi; A.Deledda; S.Spolzino; S.Pucillo 2009-01-01 - IEEE 4.01 Contributo in Atti di convegno -
RTL-to-layout implementation of an embedded coarse grained architecture for dynamically reconfigurable computing in systems-on-chip F. Campi; R. Konig; M. Dreschmann; M. Neukirchner; D. Picard; M. Juttner; E. Schuler; A. Deledda;... D. Rossi; A. Pasini; M. Hubner; J. Becker; R. Guerrieri 2009-01-01 - IEEE 4.01 Contributo in Atti di convegno -
A coarse-grain reconfigurable architecture for multimedia applications supporting subword and floating-point calculations C.Brunelli; F.Garzia; D.Rossi; J.Nurmi 2010-01-01 JOURNAL OF SYSTEMS ARCHITECTURE - 1.01 Articolo in rivista -
A Heterogeneous Digital Signal Processor for Dynamically Reconfigurable Computing D. Rossi; F. Campi; S. Spolzino; S. Pucillo; R. Guerrieri 2010-01-01 IEEE JOURNAL OF SOLID-STATE CIRCUITS - 1.01 Articolo in rivista -
The MORPHEUS Heterogeneous Dynamically Reconfigurable Platform A. Grasset; P. Millet; P. Bonnot; S. Yehia; W. Putzke-Roeming; F. Campi; A. Rosti; M. Huebner; N.... S. Voros; D. Rossi 2011-01-01 INTERNATIONAL JOURNAL OF PARALLEL PROGRAMMING - 1.01 Articolo in rivista -
Exploiting body biasing for leakage reduction: A case study Andrea Manuzzato; Fabio Campi; Davide Rossi; Valentino Liberali; Davide Pandini 2013-01-01 - - 4.01 Contributo in Atti di convegno -
A variation tolerant architecture for ultra low power multi-processor cluster Daniele Bortolotti;Davide Rossi;Andrea Bartolini;Luca Benini 2013-01-01 - 2013 IEEE 4.01 Contributo in Atti di convegno -
Application Space Exploration of a Heterogeneous Run-Time Configurable Digital Signal Processor D. Rossi; C. Mucci; F. Campi; S. Spolzino; L. Vanzolini; H. Sahlbach; S. Whitty; R. Ernst; W. Put...zke-Röming; R. Guerrieri 2013-01-01 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS - 1.01 Articolo in rivista -
Multicore Signal Processing Platform With Heterogeneous Configurable Hardware Accelerators D. Rossi; C. Mucci; M. Pizzotti; L. Perugini; R. Canegallo; R. Guerrieri 2014-01-01 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS - 1.01 Articolo in rivista -
Customizing an open source processor to fit in an ultra-low power cluster with a shared L1 memory Gautschi, Michael; Rossi, Davide; Benini, Luca 2014-01-01 - Association for Computing Machinery 4.01 Contributo in Atti di convegno -
Energy-efficient vision on the PULP platform for ultra-low power parallel computing Conti, Francesco; Rossi, Davide; Pullini, Antonio; Loi, Igor; Benini, Luca 2014-01-01 - Institute of Electrical and Electronics Engineers Inc. 4.01 Contributo in Atti di convegno -
Ultra-low-latency lightweight dma for tightly coupled multi-core clusters Rossi, Davide; Loi, Igor; Haugou, Germain; Benini, Luca 2014-01-01 - Association for Computing Machinery 4.01 Contributo in Atti di convegno -
Hybrid memory architecture for voltage scaling in ultra-low power multi-core biomedical processors Bortolotti, Daniele; Bartolini, Andrea; Weis, Christian; Rossi, Davide; Benini, Luca 2014-01-01 - IEEE Publisher 2014 4.01 Contributo in Atti di convegno -
Mostrati risultati da 1 a 20 di 157
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